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1 ps8956a 03/24/08 hdmi, high-de nition multimedia interface, and deep color are trademarks of hdmi licensing, llc in the united states and other countries. advance information - company confidential pi3hdmi101-b 1:1 active hdmi tm redriver with optimized equalization & i 2 c buffer and rxterm detection circuitry features ? supply voltage, v dd = 3.3v 5% ? support for both dvi and hdmi tm signals ? supports both ac-coupled and dc-coupled inputs ? supports deep color tm ? high performance, up to 2.5 gbps per channel ? 5v tolerance on i 2 c path ? integrated 50-ohm (10%) termination resistors at each high speed signal input ? integrated rx termination detection circuit ? con gurable output swing control (400mv, 500mv, 600mv, 750mv, 1000mv) ? con gurable pre-emphasis levels (0db, 1.5db, 3.5db, & 6.0db, 9.0db) ? con gurable de-emphasis (0db, -3.5db, -6.0db, -9.5db) ? optimized equalization single default setting will support all cable lengths ? 8kv contact esd protection on all input data/clock channels per iec61000-4-2 ? hot insertion support on output high speed pins & scl/sda pins only ? propagation delay 1ns ? high impedance outputs when disabled ? packaging (pb-free & green): 42-contact tqfn (zh42) description pericom semiconductor?s pi3hdmi101-b 1:1 active redriver circuit is targeted for high-resolution video networks that are based on dvi/hdmi tm standards and tmds signal processing. the pi3hdmi101-b is an active redriver with hi-z outputs. the device receives differential signals from selected video components and drives the video display unit. this solution also provides a unique advanced pre-emphasis technique to increase rise and fall times which are reduced during transmission across long distances. each complete hdmi tm /dvi channel also has slower speed, side band signals, that are required to be switched. pericom?s solution provides a complete solution by integrating the side band buffer together with the high speed buffer in a single solution. using equalization at the input of each of the high speed channels, pericom can successfully eliminate deterministic jitter caused by long cables from the source to the sink. the elimination of the deterministic jitter allows the user to use much longer cables (up to 25 meters). the maximum dvi/hdmi tm bandwidth of 2.5 gbps provides 36- bit deep color tm support, which is offered by hdmi tm revision 1.3. the pi3hdmi101-b also provides enhanced robust esd/ eos protection of 8kv, which is required by many consumer video networks today. the optimized equalization provides the user a single optimal setting that can provide hdmi tm compliance for all cable lengths: 1meter to 20meters and color depths of 8bit/ch, or 12bit/ch. pericom also offers the abiility to ne tune the equalization settings in situations where cable length is known. for example, if 25meter cable length is required, pericom's solution can be adjusted to 16db eq to accept 25meter cable length. using pericom's patent-pending rx termination detection circuit, pi3hdmi101-b can automatically disable its own input 50ohm termination when no 50-ohm termination is detected in the hdmi rx chipset. if a switch is used between the pi3hdmi101-b and the hdmi rx, our part can detect the 50ohm termination in the switch to determine if our input should be off or on. 08-0013
2 ps8956a 03/24/08 pi3hdmi101-b 1:1 active hdmi tm redriver with optimized equalization & i 2 c buffer and rxterm detection circuitry hdmi, high-de nition multimedia interface, and deep color are trademarks of hdmi licensing, llc in the united states and other countries. advance information - company confidential pin con guration tmds receiver block in_dx+/-, in_clk+/- r1 250kohm r2 avdd each high speed data and clock input has integrated equalization that can eliminate deterministic jitter caused by input cables. all activity can be con gured using pin strapping. the rx block is designed to receive all relevant signals directly from the hdmi tm connector without any additional circuitry, 3 high speed tmds data, 1 pixel clock, and ddc signals. tmds channels have the following temination scheme for rx sense support. the switching between 50ohm termination vs. 250kohm termination is done automatically. the pi3hdmi101-b monitors the 50-ohm termination in the rx chipset behind our part, and when this 50ohm termination is not present, we disable our 50ohm termination at our input. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 42 41 40 39 18 19 20 21 scl_t vdd gnd out_clkC out_clk+ vdd out_d0C out_d0+ gnd out_d1C out_d1+ vdd out_d2C out_d2+ gnd vdd oc_s3 eq_s0 eq_s1 gnd in_clkC in_clk+ vdd in_d0C in_d0+ gnd in_d1C in_d1+ vdd in_d2C in_d2+ gnd vdd dcc_en oe o c_s0 o c_s1 o c_s2 iadj scl_r sda_r sda_t gnd 08-0013
3 ps8956a 03/24/08 pi3hdmi101-b 1:1 active hdmi tm redriver with optimized equalization & i 2 c buffer and rxterm detection circuitry hdmi, high-de nition multimedia interface, and deep color are trademarks of hdmi licensing, llc in the united states and other countries. advance information - company confidential i 2 c buffer buffert bufferr portr portt iadj,ddc_en the vol of the buffer r is around 0.2v. the vol of the buffer t is around 0.7v. functional truth tables iadj external pull-up range h 1k to 2k (hdmi spec) l > 3k (4.7k typically) ddc_en port t / port r (if no external pull-up resistor l hi-z (i2c buffer disable) h (i2c buffer enable) 08-0013
4 ps8956a 03/24/08 pi3hdmi101-b 1:1 active hdmi tm redriver with optimized equalization & i 2 c buffer and rxterm detection circuitry hdmi, high-de nition multimedia interface, and deep color are trademarks of hdmi licensing, llc in the united states and other countries. advance information - company confidential pin description pin # pin name i/o description 5, 8, 11, 14 in_clk+, in_d0+, in_d1+, in_d2+ i tmds positive inputs 4, 7, 10, 13 in_clk-, in_d0-, in_d1-, in_d2- i tmds negative inputs 3, 9, 15, 24, 30, 36 gnd p ground 18 oe i output enable, active low 41 scl_r i/o ddc clock , source side 40 sda_r i/o ddc data, source side 6, 12, 16, 23, 27, 33, 37 v dd p 3.3v power supply 34, 31, 28, 25 out_clk+, out_d0+, out_d1+, out_d2+ o tmds positive outputs 35, 32, 29, 26 out_clk-, out_d0-, out_ d1-, out_d2- o tmds negative outputs 1, 2 eq_s0, eq_s1 i equalizer controls, both pins with internal pull-ups 19, 20, 21, 22 oc_s0, oc_s1, oc_s2, oc_s3 i output buffer controls note: all 4 pins have internal pull-ups 17 ddc_en i i2c path enable 38 scl_t i/o ddc clock, sink side 39 sda_t i/o ddc data, sink side 42 iadj i high/low voltage selection, depends on i2c external pull-up range 08-0013
5 ps8956a 03/24/08 pi3hdmi101-b 1:1 active hdmi tm redriver with optimized equalization & i 2 c buffer and rxterm detection circuitry hdmi, high-de nition multimedia interface, and deep color are trademarks of hdmi licensing, llc in the united states and other countries. advance information - company confidential complete high speed input rx block is as follows: (1) r e vi ec er qe hti w r e vi ec er qe hti w r e vi ec er qe hti w r e vi ec er qe hti w eq_s1 eq_s0 in_d0+ in_d0- in_d1+ in_d1- in_d2+ in_d2- dd v r2 r2 250k r1 r1 250k in_clk+ in_clk- out_d0+ out_d0- out_d1+ out_d1- out_d2+ out_d2- out_clk+ out_clk- tmds drive tmds drive tmds drive tmds drive oc_s0 oc_s1 oc_s2 oc_s3 oe control buffert buffer r port r port t iadj, ddc_en dd v r2 r2 250k r1 r1 250k dd v r2 r2 250k r1 r1 250k dd v r2 r2 250k r1 r1 250k 08-0013
6 ps8956a 03/24/08 pi3hdmi101-b 1:1 active hdmi tm redriver with optimized equalization & i 2 c buffer and rxterm detection circuitry hdmi, high-de nition multimedia interface, and deep color are trademarks of hdmi licensing, llc in the united states and other countries. advance information - company confidential truth table oe function 0 active 1 all tmds outputs are hi-z eq setting value logic table eq_s1 (2) eq_s0 (2) gain (db) 1 1 optimized equalization (default setting) 108 013 001 5 notes: 1. external pull-ups are required along scl/sda path 2. internal 100kohm pull-ups truth table 1 oc_s3 (2) oc_s2 (2) oc_s1 (2) oc_s0 (2) vswing(mv) pre/de-emphasis 1 1 1 1 500 0db 1 1 1 0 600 0db 1 1 0 1 750 0db 1 1 0 0 1000 0db 1 0 1 1 500 0db 1 0 1 0 500 1.5db 1 0 0 1 500 3.5db 1 0 0 0 500 6db 0 1 1 1 400 0db 0 1 1 0 400 3.5db 0 1 0 1 400 6db 0 1 0 0 400 9db 0 0 1 1 1000 0db 0 0 1 0 666 -3.5db 0 0 0 1 500 -6db 0 0 0 0 333 -9db 08-0013
7 ps8956a 03/24/08 pi3hdmi101-b 1:1 active hdmi tm redriver with optimized equalization & i 2 c buffer and rxterm detection circuitry hdmi, high-de nition multimedia interface, and deep color are trademarks of hdmi licensing, llc in the united states and other countries. advance information - company confidential storage temperature .................................................... ?65c to +150c supply voltage to ground potential ................................ ?0.5v to +4.0v dc input voltage ...............................................................?0.5v to v dd dc output current ....................................................................... 120ma power dissipation ........................................................................... 1.0w note: stresses greater than those listed under max i mum rat ings may cause permanent damage to the de vice. this is a stress rating only and func tion al op er a tion of the device at these or any other conditions above those indicated in the operational sections of this spec i ca tion is not implied. exposure to ab- solute max i mum rating con di tions for extended periods may affect re li abil i ty. maximum ratings (above which useful life may be impaired. for user guide lines, not tested.) recommended operating conditions symbol parameter min. typ. max. units v dd supply voltage 3.135 3.3 3.465 v t a operating free-air temperature 0 70 c tmds differential pins v id receiver peak-to-peak differential input voltage 150 1560 mvp-p v ic input common mode voltage 2 v dd + 0.01 v v dd tmds output termination voltage 3.135 3.3 3.465 v r t termination resistance 45 50 55 ohm signaling rate 0 2.5 gbps control pins (oc_sx, eq_sx, oe, ddc_en) v ih lvttl high-level input voltage 2 v dd v v il lvttl low-level input voltage gnd 0.8 ddc pins (scl_r, scl_t, sda_r, sda_t) v i(ddc) input voltage gnd 5.5 v i 2 c pins (scl_t, sda_t) v ih high-level input voltage 0.7 x v dd 5.5 v v il low-level input voltage -0.5 0.3 x v dd v v icl low-level input voltage contention (1) -0.5 0.4 v i 2 c pins (scl_r, sda_r) v ih high-level input voltage 0.7 x v dd 5.5 v v il low-level input voltage -0.5 0.3 x v dd v notes: 1. v il speci cation is for the rst low level seen by the scl/sda lines. v icl is for the second and subsequent low levels seen by the scl_t/sda_t lines. 08-0013
8 ps8956a 03/24/08 pi3hdmi101-b 1:1 active hdmi tm redriver with optimized equalization & i 2 c buffer and rxterm detection circuitry hdmi, high-de nition multimedia interface, and deep color are trademarks of hdmi licensing, llc in the united states and other countries. advance information - company confidential item hdmi 1.3 spec pericom product spec operating conditions termination supply voltage, v dd 3.3v 5% 3.30 5% terminal resistance 50-ohm 10% 45 to 55-ohm source dc characteristics at tp1 single-ended high level output voltage, vh v dd 10mv v dd 10mv single-ended low level output voltage, vl ( v dd - 600mv) vl ( v dd - 400mv) ( v dd - 600mv) vl ( v dd - 400mv) single-ended output swing voltage, vswing 400mv vswing 600mv 400mv vswing 600mv single-ended standby (off) output voltage, voff v dd 10mv v dd 10mv transmitter ac characteristics at tp1 risetime/falltime (20%-80%) 75ps risetime/falltime 0.4 tbit (75ps tr/tf 242ps) @ 1.65 gbps 240ps intra-pair skew at transmitter connector, max 0.15 tbit (90.9ps @ 1.65 gbps) 60ps max inter-pair skew at transmitter connector, max 0.2 tpixel (1.2ns @ 1.65 gbps) 100ps max clock jitter, max 0.25 tbit (151.5ps @ 1.65 gbps) 82ps max sink operating dc characteristics at tp2 input differential voltage level, vdiff 150 vdiff 1200mv 150mv v diff 1200mv input common mode voltage level, v icm ( v dd - 300mv) vicm ( v dd - 37.5mv) or v dd 10% ( v dd - 300mv) vicm ( v dd - 37.5mv) or v dd 10% sink dc characteristics when source disabled or disconnected at tp2 differential voltage level v dd 10mv v dd 10mv tmds compliance test results 08-0013
9 ps8956a 03/24/08 pi3hdmi101-b 1:1 active hdmi tm redriver with optimized equalization & i 2 c buffer and rxterm detection circuitry hdmi, high-de nition multimedia interface, and deep color are trademarks of hdmi licensing, llc in the united states and other countries. advance information - company confidential symbol parameter test conditions min. typ. (1) max. units i cc supply current v ih = v dd , v il = v dd - 0.4v, r t = 50-ohm, v dd = 3.3v data inputs = 1.65 gbps hdmi data pattern clk inputs = 165 mhz clock oc_sx = low, x = 0,1,2,3 120 ma p d power dissipation 400 mw i ccq standby current oe = high, v dd = 3.3v, rxsense = low 8m a tmds differential pins v oh single-ended high-level output voltage v dd = 3.3v, r t = 50-ohm pre-emphasis/de-emphasis = 0db v dd - 10 v dd + 10 mv v ol single-ended low-level output voltage v dd - 600 v dd - 400 v swing single-ended output swing voltage 400 600 v od(o) overshoot of output differential volt- age 6% 15% 2x v swing v od(u) undershoot of output differential volt- age 12% 25% v oc(ss) change in steady-state common-mode output voltage between logic states 0.5 5 mv |i (os) | short circuit output current 12 ma v ode(ss) steady state output differential voltage oc_sx = gnd, data inputs = 250 mbps hdmi data pattern, 25 mhz pixel clock 560 840 mvp-p v ode(pp) peak-to-peak output differential voltage 800 1200 v i(open) single-ended input voltage under high impedance input or open input i i = 10a v dd - 10 v dd + 10 mv r int input termination resistance v in = 2.9v 45 50 55 ohm control pins (oe, ddc_en, iadj) i ih high-level digital input current v ih = 2v or v dd -10 10 a i il low-level digital input current v i = gnd or 0.8 v -10 10 a i 2 c pins (scl_t, sda_t) (t port) i ikg input leakage current v i = 5.5 v -50 50 a v i = v dd -10 10 i oh high-level output current v o = 3.6 v -10 10 a i il low-level input current v il = gnd -40 40 a v ol low-level output voltage i ol = 2.5 ma iadj = h 0.65 0.9 v c io input/output capacitance v i = 5.0 v or 0 v, freq = 100khz 25 pf v i = 3.0 v or 0 v, freq = 100khz 10 v oh(ttl) 1 ttl high-level output voltage i oh = -8 ma 2.4 v v ol(ttl) 1 ttl low-level output voltage i ol = 8 ma 0.4 v note: 1. voh/vol of external driver at the r and t ports. (table continued) electrical characteristics (over recommended operating conditions unless otherwise noted) 08-0013
10 ps8956a 03/24/08 pi3hdmi101-b 1:1 active hdmi tm redriver with optimized equalization & i 2 c buffer and rxterm detection circuitry hdmi, high-de nition multimedia interface, and deep color are trademarks of hdmi licensing, llc in the united states and other countries. advance information - company confidential switching characteristics (over recommended operating conditions unless otherwise noted) symbol parameter test conditions min. typ. (1) max. units tmds differential pins tpd propagation delay v dd = 3.3v, r t = 50-ohm, pre-emphasis/de-emphasis = 0db 2000 ps t r differential output signal rise time (20% - 80%) 75 240 t f differential output signal fall time (20% - 80%) 75 240 t sk(p) pulse skew 10 50 t sk(d) intra-pair differential skew 23 50 t sk(o) inter-pair differential skew (2) 100 t jit(pp) peak-to-peak output jitter from tmds clock channel pre-emphasis/de-emphasis = 0db, data inputs = 1.65 gbps hdmi data pattern clk input = 165 mhz clock 15 30 t jit(pp) peak-to-peak output jitter from tmds data channel 18 50 t de de-emphasis duration de-emphasis = -3.5db, data inputs = 250 mbps hdmi data pattern, clk output = 25 mhz clock 240 t sx select to switch output 10 ns t en enable time 200 t dis disable time 10 i2c pins (scl_r, sda_r, scl_t, sda_t) t plh propagation delay time, low-to-high-level output scl_t/sda_t to scl_r/sda_r iadj = v dd c load = 300 pf tbuffer : rpu = 2k, vpu = 3.0v 500 ns t phl propagation delay time, high-to-low-level output scl_t/sda_t to scl_r/sda_r 136 t plh propagation delay time, low-to-high-level output scl_t/sda_t to scl_r/sda_r rbuffer : rpu = 1.2k, vpu = 3.3v or rpu = 1.8k, vpu = 5v iadj = gnd c load = 100 pf 450 t phl propagation delay time, high-to-low-level output scl_t/sda_t to scl_r/sda_r 136 t r scl_t/sda_t output signal rise time see fig. a 999 t f scl_t/sda_t output signal fall time 90 t r scl_r/sda_r output signal rise time 999 t f scl_r/sda_r output signal fall time 90 (table continued) i 2 c pins (scl_r, sda_r) (r port) i ikg input leakage current v i = 5.5 v -50 50 a v i = v dd -10 10 i oh high-level output current v o = 3.6 v -10 10 a i il low-level input current v il = gnd -10 10 a v ol low-level output voltage i ol = 4 ma, iadj = h 0.2 v c i input capacitance v i = 5.0 v or 0 v, freq = 100khz 25 pf v i = 3.0 v or 0 v, freq = 100khz 10 08-0013
11 ps8956a 03/24/08 pi3hdmi101-b 1:1 active hdmi tm redriver with optimized equalization & i 2 c buffer and rxterm detection circuitry hdmi, high-de nition multimedia interface, and deep color are trademarks of hdmi licensing, llc in the united states and other countries. advance information - company confidential t set enable to start condition 6 10 ns t hold enable after stop condition 6 10 pulse generator d.u.t. v dd 3.3v10% r=1.2k l c=100pf l v in v iout pulse generator d.u.t. v dd 3.3v10% r=2k l c=300pf l v in v iout iadj=l iadj=h t f t f 20% 80% 20% 80% t phl t plh rscl/rsda input tscl/tsda input v dd v cc /2 0.1v 3.3v10% 1.5v v ol t f t f 20% 80% 20% 80% t phl t plh rscl/rsda input tscl/tsda input v dd 1.5v 0.1v 5v10% v ol v dd /2 t plh figure a. i 2 c timing test circuit and de nition 08-0013
12 ps8956a 03/24/08 pi3hdmi101-b 1:1 active hdmi tm redriver with optimized equalization & i 2 c buffer and rxterm detection circuitry hdmi, high-de nition multimedia interface, and deep color are trademarks of hdmi licensing, llc in the united states and other countries. advance information - company confidential pericom semiconductor corporation ? 1-800-435-2336 ? www.pericom.com ordering information ordering code package code package description PI3HDMI101-BZHE zh 42-pin, pb-free & green tqfn notes: ? thermal characteristics can be found on the company web site at www.pericom.com/packaging/ ? e = pb-free and green ? adding an x suf x = tape/reel ? hdmi & deep color are trademarks of silicon image package mechanical: 42-pin, low pro le quad flat package (zh42) application information supply voltage all v dd pins are recommended to have a 0.01uf capacitor tied from v dd to gnd to lter supply noise tmds inputs standard tmds terminations have already been integrated into pericom?s pi3hdm101-a device. therefore, external terminations are not required. any unused port must be left oating and not tied to gnd. 08-0013
13 ps8956a 03/24/08 pi3hdmi101-b 1:1 active hdmi tm redriver with optimized equalization & i 2 c buffer and rxterm detection circuitry hdmi, high-de nition multimedia interface, and deep color are trademarks of hdmi licensing, llc in the united states and other countries. advance information - company confidential hdmi licensing, llc, a wholly owned subsidiary of silicon image, inc., is the agent responsible for li- censing the hdmi speci cation, promoting the hdmi standard and providing education on the bene ts of hdmi to retailers and consumers. the hdmi speci cation was developed by sony, hitachi, thomson (rca), philips, matsushita (panasonic), toshiba and silicon image as the digital interface standard for the consumer electronics market. the hdmi speci cation combines uncompressed high-de nition video and multi-channel audio in a single digital interface to provide crystal-clear digital quality over a single cable. for more information about hdmi, please visit www.hdmi.org 08-0013

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